Former projects
Proven Results
Video frontend coprocessor (automotive)
The aim was to create a frontend coprocessor architecture, that serves as a high-performance computing unit in the video analytics of an automotive industrial product. The product was capable of close object, lane, traffic sign and pedestrian detection and object recognition. The coprocessor was implemented on the Altera SoC (System on Chip) platform.
The coprocessor had to complete complex, real time HD video processing tasks based on optical flow estimation.
The algorithmic background was defined and tested in MATLAB.
Functionalities were implemented on ARM platform in C/C++.
Finally the whole coprocessor was implemented on FPGA in VHDL and Verilog.
A processor simulation environment was created in ModelSIM and a test software was developed for real time tests.
Responsibilities included the assessment of needs, team working, documentation and project planning.
Event detection intelligent camera (nuclear)
Several FPGA (Altera Stratix) and software modules had to be created for a high speed intelligent camera system (EDICAM).
HDL and C++ were used to program both the FPGA of the camera and of the motherboard, the latter of which was connected to the motherboard via PCIe.
The main goal was to establish real time firmware updates to the FPGA of the camera, driven by the FPGA of the motherboard.
The control software between the PC and the FPGA was implemented in C++.
Video test pattern generator (video industry)
Our client developed cutting edge products in video industry, such as extenders, matrices, switchers. They benefited from having a widely configurable video test pattern generator with which their complex video systems could be easily tested visually.
The project focused on creating a video test environment that displayed different patterns in various configurable frame resolutions.
The FPGA modules for video transmitter systems were implemented on Lattice FPGA.
The FPGA test system was finalized and interfaced with an ARM controller.
Video acceleration methods (gaming industry)
The goal of the project was to support an existing embedded video game platform with some video acceleration methods for better user experience.
The main logic of the game was implemented by the customer, we needed to provide some video acceleration methods.
The implemented methods included amongst others double buffering, frame overlaying, sprites, etc. The modules were implemented on Xilinx Spartan FPGA. The accelerators were controlled by the internally synthesized Microblaze microprocessor.
Tests were carried out via Ethernet, using TCP/IP and UDP protocols.